Analog to digital converters (ADCS) are conventionally used to convert analog signals to digital codes or signals for processing. Dedicated ADC chips can be readily tested in manufacturing by applying a known analog input to the chip and evaluating the digital output. Many current microelectronic circuit chips embed the ADC with processors and other circuits. Embedded ADCs are difficult and time-consuming to test in manufacturing. Access to the digital output data to assess the behavior of the ADC may be difficult or impossible, particularly when testing at speed. The ADC can be tested using static techniques. Digital data is accessed via a serial scan path. However, a 16-bit ADC requires a prohibitive number of scan downloads (from a tester or test time perspective) to verify that the ADC is functional for every digital code.
On the analog input side of ADCS, ramp inputs have traditionally been the preferred technique to stimulate the ADC to exercise all of the digital output codes. This requires either special mixed signal automatic test equipment (ATE) or additional components on the tester to the device under test interface board.
The present invention is directed to solving one or more of the problems discussed above in a novel and simple manner.